Arthur H.M. van Roermund

This book describes a unique approach to smart receiver system design. It starts with the analysis of a very basic, single-path receiver structure, then using similar methods, extends the analysis to a more complicated multi-path receiver. Within the multi-path structure, two different types of phased –array architectures are discussed: Analog beam-forming, and digital beam-forming. The pros and cons are studied, and the gaps are identified. Whereas previous books in this area focus mainly on phased-array circuit implementations, this book fills a gap by providing a system-level approach and introduces new methods for developing smart systems.

1. 1 Power-dissipation trends in CMOS circuits Shrinking device geometry, growing chip area and increased data-processing speed performance are technological trends in the integrated circuit industry to enlarge chip functionality. Already in 1965 Gordon Moore predicted that the total number of devices on a chip would double every year until the 1970s and every 24 months in the 1980s. This prediction is widely known as "Moore's Law" and eventually culminated in the Semiconductor Industry Association (SIA) technology road map [1]. The SIA road map has been a guide for the in­ dustry leading them to continued wafer and die size growth, increased transistor density and operating frequencies, and defect density reduction. To mention a few numbers; the die size increased 7% per year, the smallest feature sizes decreased 30% and the operating frequencies doubled every two years. As a consequence of these trends both the number of transistors and the power dissi­ pation per unit area increase. In the near future the maximum power dissipation per unit area will be reached. Down-scaling of the supply voltage is not only the most effective way to reduce power dissipation in general it also is a necessary precondition to ensure device reliability by reducing electrical fields and device temperature, to prevent device degradation. A draw-back of this solution is an increased signal propa­ gation delay, which results in a lower data-processing speed performance.

Mixed-Signal Layout Generation Concepts covers important physical-design issues that exist in contemporary analog and mixed-signal design flows. Due to the increasing pressure on time-to-market, the steep increase in chip fabrication costs, and the increasing design complexity, it becomes even more challenging to produce a first-time right IC layout. The fundamental issues in creating a layout are placement and routing. Although these coupled problems have been investigated for many decades, no satisfactory automated solution has emerged yet. Fortunately, supported by modern computing power and results of new research that further improve computation efficiency, significant steps forward have been taken.

Sigma Delta converters are a very popular choice for the A/D converter in multi-standard, mobile and cellular receivers. Key A/D converter specifications are high dynamic range, robustness, scalability, low-power and low EMI. Robust Sigma Delta Converters presents a requirement derivation of a Sigma Delta modulator applied in a receiver for cellular and connectivity, and shows trade-offs between RF and ADC. The book proposes to categorize these requirements in 5 quality indicators which can be used to qualify a system, namely accuracy, robustness, flexibility, efficiency and emission. In the book these quality indicators are used to categorize Sigma Delta converter theory. A few highlights on each of these quality indicators are; Quality indicators: provide a means to quantify system quality. Accuracy: introduction of new Sigma Delta Modulator architectures. Robustness: a significant extension on clock jitter theory based on phase and error amplitude error models. Extension of the theory describing aliasing in Sigma Delta converters for different types of DACs in the feedback loop. Flexibility: introduction of a Sigma Delta converter bandwidth scaling theory leading to very flexible Sigma Delta converters. Efficiency: introduction of new Figure-of-Merits which better reflect performance-power trade-offs. Emission: analysis of Sigma Delta modulators on emission is not part of the bookThe quality indicators also reveal that, to exploit nowadays advanced IC technologies, things should be done as much as possible digital up to a limit where system optimization allows reducing system margins. At the end of the book Sigma Delta converter implementations are shown which are digitized on application-, architecture-, circuit- and layout-level. Robust Sigma Delta Converters is written under the assumption that the reader has some background in receivers and in A/D conversion.

Smart and Flexible Digital-to-Analog Converters proposes new concepts and implementations for flexibility and self-correction of current-steering digital-to-analog converters (DACs) which allow the attainment of a wide range of functional and performance specifications, with a much reduced dependence on the fabrication process. DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties. DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.

Integrated 60GHz RF Beamforming in CMOS describes new concepts and design techniques that can be used for 60GHz phased array systems. First, general trends and challenges in low-cost high data-rate 60GHz wireless system are studied, and the phased array technique is introduced to improve the system performance. Second, the system requirements of phase shifters are analyzed, and different phased array architectures are compared. Third, the design and implementation of 60GHz passive and active phase shifters in a CMOS technology are presented. Fourth, the integration of 60GHz phase shifters with other key building blocks such as low noise amplifiers and power amplifiers are described in detail. Finally, this book describes the integration of a 60GHz CMOS amplifier and an antenna in a printed circuit-board (PCB) package.

Analog design still has, unfortunately, a flavor of art. Art can be beautiful. However, art in itself is difficult to teach to students and difficult to transfer from experienced analog designers to new trainee designers in companies. Structured Electronic Design: High-Performance Harmonic Oscillators and Bandgap References aims to systemize analog design. The use of orthogonalization of the design of the fundamental quality aspects (noise, distortion, and bandwidth) and hierarchy in the subsequent design steps, enables designers to achieve high-performance designs, in a relatively short time. As a result of the systematic design procedure, the effect of design decisions on the circuit performance is made clear. Additionally, the use of resources for reaching a specified performance is tracked. This book, therefore, describes the structured electronic design of high-performance harmonic oscillators and bandgap references. The structured design of harmonic oscillators includes the maximization of the carrier-to- noise ratio by means of tapping, i.e. an impedance adaption method for noise matching. The bandgap reference, a popular implementation of a voltage reference, is studied via the unusual concept of the linear combination of base-emitter voltages. The presented method leads to the design of high-performance references in CMOS and Bipolar technology. Using this concept, on a high level of abstraction the quality with respect to, for instance, noise and power-supply rejection can be identified. In this book, it is shown with several design examples that this method provides an excellent starting point for the design of high-performance bandgap references. Auxiliary to the harmonic-oscillator and bandgap reference design are the negative- feedback amplifiers. In this book the systematic design of the dynamic behavior is emphasized. By means of the identification of the dominant poles, it is possibleto give an upper limit of the attainable bandwidth, even before the real frequency compensation is accomplished. Structured Electronic Design: High-Performance Harmonic Oscillators and Bandgap References is a valuable book for researchers and designers, as well as students in the field of analog design. It helps both the experienced and trainee designer to come to grips with the design of analog circuits. The presented method is illustrated by several well- described design examples.

In many electronic systems, such as telecommunication or measurement systems, oscillations play an essential role in the information processing. Each electronic system poses different requirements on these oscillations, depending on the type and performance level of that specific system. It is the designer's challenge to find the specifications for the desired oscillation and to implement an electronic circuit meeting these specifications. As the desired oscillations have to fulfill many requirements, the design process can become very complex. To find an optimal solution, the designer requires a design methodology that is preferably completely top-down oriented. To achieve such a methodology, it must be assured that each property of the system can be optimized independently of all other properties. Oscillators and Oscillator Systems: Classification, Analysis and Synthesis takes a systematic approach to the design of high-performance oscillators and oscillator systems. A fundamental classification of oscillators, based on their internal timing references, forms the basis of this approach. The classification enables the designer to make strategic design decisions at a high hierarchical level of the design process. Techniques, derived from the systematic approach, are supplied to the designer to enable him or her to bring the performance of the system as close as possible to the fundamental limits. Oscillators and Oscillator Systems: Classification, Analysis and Synthesis is an excellent reference for researchers and circuit designers, and may be used as a text for advanced courses on the topic.

IGH-SPEED Digital to Analog (D/A) converters are essential components in digi- Htal communication systems providing the necessary conversion of signals encoding information in bits to signals encoding information in their amplitude vs. time domain characteristics. In general, they are parts of a larger system, the interface, which c- sists of several signal conditioning circuits. Dependent on where the converter is located within the chain of circuits in the interface, signal processing operations are partitioned in those realized with digital techniques, and those with analog. The rapid evolution of CMOS technology has established implicit and explicite trends related to the interface, and in particular to the D/A converter. The implicit relationship comes via the growth of digital systems. First, it is a global trend with respect to all interface circuits that increasing operating frequencies of digital systems place a similar demand for the interface circuits. The second trend takes place locally within the int- face. Initially, the D/A converter was placed at the beginning of the interface chain, and all signal conditioning was implemented in the analog domain after the D/A conversion. The increasing ?exibility and robustness of digital signal processing shifted the D/A converter closer to the end point of the chain where the demands for high quality high frequency operation are very high.

Switched capacitor (SC) techniques are well proven to be excellent candidates for implementing critical analogue functions with high accuracy, surpassing other analogue techniques when embedded in mixed-signal CMOS VLSI. Conventional SC circuits are primarily limited in accuracy by a) capacitor matching and b) the accuracy with which a differential amplifier can squeeze charge from one capacitor to another between clock periods. In Switched-Capacitor Techniques for High-Accuracy Filter and ADC Design, alternative SC techniques are proposed which allow the achievement of higher intrinsic analogue functional accuracy than previously possible in such application areas as analogue filter and ADC design. The design philosophy is to create the required functionality without relying on digital calibration or correction means but instead to develop methods which have reduced dependence on both component matching (especially capacitor matching) and parasitic effects (especially parasitic capacitance). However, the proposed techniques are just as amenable to further digital accuracy enhancement via calibration and/or correction as traditional methods. Two popular application areas are explored in the course of this book for exploitation of the proposed techniques, viz. SC filters and algorithmic ADCs - both cyclic and pipelined. Furthermore, efficient system level design procedures are explored in each of these two areas. The validity of the concepts developed and analyzed in Switched-Capacitor Techniques for High-Accuracy Filter and ADC Design has been demonstrated in practice with the design of CMOS SC bandpass filters and algorithmic ADC stages. For example, a 10.7MHz radio IF selectivity filter integrated in standard CMOS, employing the proposed methods, achieves an accuracy greater than ceramic filters. Another example is an ADC with better than 12-bit intrinsic accuracy, albeit capacitors with only 9-bits matching accuracy were used in the realization. The ADC architecture is also very robust and proven in an embedded digital VLSI application in the very newest 65nm CMOS. The power consumptions and silicon areas of the solutions proposed here are lower than other known solutions from the literature.

1.1 Background Moore’s Law predicts a decrease by a factor of two in the feature size of CMOS te- nology every three years and has been valid for years. It implies a doubling of the - eration speed and a four times higher transistor count per unit of area, every three years. The combination leads to an eight times higher processing capability per unit of area. This on-going miniaturization allows the integration of complex electronic systems with millions of transistors (Very-Large-Scale-Integration) and enables the integration of el- tronic systems. An electronic system A generic picture of an integrated electronic system is shown in ?g. 1.1. The heart of the system is the signal processing core. This core supports a wide variety of functions, such as customization and programmability of multiple applications, channel coding, the de?nition of the user interface, etc. These functions are enabled by DSP, a controller CPU and various blocks of memory. In advanced ICs these blocks provide (almost) all signal processing and usually dominate in the overall power and area consumption of integrated systems. The huge data rates involved, require high-speed busses for communication between these blocks. A power-management unit fuels the system by providing the - propriate supply voltages and currents.

The RF front-end – antenna combination is a vital part of a mobile phone because its performance is very relevant to the link quality between hand-set and cellular network base-stations. The RF front-end performance suffers from changes in operating environment, like hand-effects, that are often unpredictable. Adaptive RF Front-Ends for Hand-Held Applications presents an analysis on the impact of fluctuating environmental parameters. In order to overcome undesired behavior two different adaptive control methods are treated that make RF frond-ends more resilient: adaptive impedance control, and adaptive power control. Several adaptive impedance control techniques are discussed, using a priori knowledge on matching network properties, in order to simplify robust 2-dimensional control. A generic protection concept is presented, based on adaptive power control, which improves the ruggedness of a power amplifier or preserves its linearity under extremes. It comprises over-voltage, over-temperature, and under-voltage protection.

Abstract This chapter lays the foundation for the work presented in latter chapters. The potential of 60 GHz frequency bands for high data rate wireless transfer is discussed and promising applications are enlisted. Furthermore, the challenges related to 60 GHz IC design are presented and the chapter concludes with an outline of the book. Keywords Wireless communication 60 GHz Millimeter wave integrated circuit design Phase-locked loop CMOS Communication technology has revolutionized our way of living over the last century. Since Marconi’s transatlantic wireless experiment in 1901, there has been tremendous growth in wireless communication evolving from spark-gap telegraphy to today’s mobile phones equipped with Internet access and multimedia capabilities. The omnipresence of wireless communication can be observed in widespread use of cellular telephony, short-range communication through wireless local area networks and personal area networks, wireless sensors and many others. The frequency spectrum from 1 to 6 GHz accommodates the vast majority of current wireless standards and applications. Coupled with the availability of low cost radio frequency (RF) components and mature integrated circuit (IC) techn- ogies, rapid expansion and implementation of these systems is witnessed. The downside of this expansion is the resulting scarcity of available bandwidth and allowable transmit powers. In addition, stringent limitations on spectrum and energy emissions have been enforced by regulatory bodies to avoid interference between different wireless systems.

The history of the application of semiconductors for controlling currents goes back all the way to 1926, in which Julius Lilienfeld led a patent for a “Method and apparatus for controlling electric currents” [1], which is considered the rst work on metal/semiconductor eld-effect transistors. More well-known is the work of William Shockley, John Bardeen and Walter Brattain in the 1940s [2, 3], after which the development of semiconductor devices commenced. In 1958, independent work from Jack Kilby and Robert Noyce ledto the invention of integrated circuits. A few milestones in IC design are the rst monolithic operational ampli er in 1963 (Fairchild? A702, Bob Widlar) and the rst o- chip 4-bit microprocessor in 1971 (Intel 4004). Ever since the start of the semiconductor history, integration plays an imp- tant role: starting from single devices, ICs with basic functions were developed (e. g. opamps, logic gates), followed by ICs that integrate larger parts of a s- tem (e. g. microprocessors, radio tuners, audio ampli ers). Following this trend of system integration, this eventually leads to the integration of analog and d- ital components in one chip, resulting in mixed-signal ICs: digital components are required because signal processing is preferably done in the digital - main; analog components are required because physical signals are analog by nature. Mixed-signal ICs are already widespread in many applications (e. g. - dio, video); for the future, it is expected that this trend will continue, leading to a larger scale of integration.

Switched capacitor (SC) techniques are well proven to be excellent candidates for implementing critical analogue functions with high accuracy, surpassing other analogue techniques when embedded in mixed-signal CMOS VLSI. Conventional SC circuits are primarily limited in accuracy by a) capacitor matching and b) the accuracy with which a differential amplifier can squeeze charge from one capacitor to another between clock periods. In Switched-Capacitor Techniques for High-Accuracy Filter and ADC Design, alternative SC techniques are proposed which allow the achievement of higher intrinsic analogue functional accuracy than previously possible in such application areas as analogue filter and ADC design. The design philosophy is to create the required functionality without relying on digital calibration or correction means but instead to develop methods which have reduced dependence on both component matching (especially capacitor matching) and parasitic effects (especially parasitic capacitance). However, the proposed techniques are just as amenable to further digital accuracy enhancement via calibration and/or correction as traditional methods. Two popular application areas are explored in the course of this book for exploitation of the proposed techniques, viz. SC filters and algorithmic ADCs - both cyclic and pipelined. Furthermore, efficient system level design procedures are explored in each of these two areas. The validity of the concepts developed and analyzed in Switched-Capacitor Techniques for High-Accuracy Filter and ADC Design has been demonstrated in practice with the design of CMOS SC bandpass filters and algorithmic ADC stages. For example, a 10.7MHz radio IF selectivity filter integrated in standard CMOS, employing the proposed methods, achieves an accuracy greater than ceramic filters. Another example is an ADC with better than 12-bit intrinsic accuracy, albeit capacitors with only 9-bits matching accuracy were used in the realization. The ADC architecture is also very robust and proven in an embedded digital VLSI application in the very newest 65nm CMOS. The power consumptions and silicon areas of the solutions proposed here are lower than other known solutions from the literature.

1.1 Background Moore’s Law predicts a decrease by a factor of two in the feature size of CMOS te- nology every three years and has been valid for years. It implies a doubling of the - eration speed and a four times higher transistor count per unit of area, every three years. The combination leads to an eight times higher processing capability per unit of area. This on-going miniaturization allows the integration of complex electronic systems with millions of transistors (Very-Large-Scale-Integration) and enables the integration of el- tronic systems. An electronic system A generic picture of an integrated electronic system is shown in ?g. 1.1. The heart of the system is the signal processing core. This core supports a wide variety of functions, such as customization and programmability of multiple applications, channel coding, the de?nition of the user interface, etc. These functions are enabled by DSP, a controller CPU and various blocks of memory. In advanced ICs these blocks provide (almost) all signal processing and usually dominate in the overall power and area consumption of integrated systems. The huge data rates involved, require high-speed busses for communication between these blocks. A power-management unit fuels the system by providing the - propriate supply voltages and currents.

IGH-SPEED Digital to Analog (D/A) converters are essential components in digi- Htal communication systems providing the necessary conversion of signals encoding information in bits to signals encoding information in their amplitude vs. time domain characteristics. In general, they are parts of a larger system, the interface, which c- sists of several signal conditioning circuits. Dependent on where the converter is located within the chain of circuits in the interface, signal processing operations are partitioned in those realized with digital techniques, and those with analog. The rapid evolution of CMOS technology has established implicit and explicite trends related to the interface, and in particular to the D/A converter. The implicit relationship comes via the growth of digital systems. First, it is a global trend with respect to all interface circuits that increasing operating frequencies of digital systems place a similar demand for the interface circuits. The second trend takes place locally within the int- face. Initially, the D/A converter was placed at the beginning of the interface chain, and all signal conditioning was implemented in the analog domain after the D/A conversion. The increasing ?exibility and robustness of digital signal processing shifted the D/A converter closer to the end point of the chain where the demands for high quality high frequency operation are very high.

Mixed-Signal Layout Generation Concepts covers important physical-design issues that exist in contemporary analog and mixed-signal design flows. Due to the increasing pressure on time-to-market, the steep increase in chip fabrication costs, and the increasing design complexity, it becomes even more challenging to produce a first-time right IC layout. The fundamental issues in creating a layout are placement and routing. Although these coupled problems have been investigated for many decades, no satisfactory automated solution has emerged yet. Fortunately, supported by modern computing power and results of new research that further improve computation efficiency, significant steps forward have been taken.

Analog design still has, unfortunately, a flavor of art. Art can be beautiful. However, art in itself is difficult to teach to students and difficult to transfer from experienced analog designers to new trainee designers in companies. Structured Electronic Design: High-Performance Harmonic Oscillators and Bandgap References aims to systemize analog design. The use of orthogonalization of the design of the fundamental quality aspects (noise, distortion, and bandwidth) and hierarchy in the subsequent design steps, enables designers to achieve high-performance designs, in a relatively short time. As a result of the systematic design procedure, the effect of design decisions on the circuit performance is made clear. Additionally, the use of resources for reaching a specified performance is tracked. This book, therefore, describes the structured electronic design of high-performance harmonic oscillators and bandgap references. The structured design of harmonic oscillators includes the maximization of the carrier-to- noise ratio by means of tapping, i.e. an impedance adaption method for noise matching. The bandgap reference, a popular implementation of a voltage reference, is studied via the unusual concept of the linear combination of base-emitter voltages. The presented method leads to the design of high-performance references in CMOS and Bipolar technology. Using this concept, on a high level of abstraction the quality with respect to, for instance, noise and power-supply rejection can be identified. In this book, it is shown with several design examples that this method provides an excellent starting point for the design of high-performance bandgap references. Auxiliary to the harmonic-oscillator and bandgap reference design are the negative- feedback amplifiers. In this book the systematic design of the dynamic behavior is emphasized. By means of the identification of the dominant poles, it is possibleto give an upper limit of the attainable bandwidth, even before the real frequency compensation is accomplished. Structured Electronic Design: High-Performance Harmonic Oscillators and Bandgap References is a valuable book for researchers and designers, as well as students in the field of analog design. It helps both the experienced and trainee designer to come to grips with the design of analog circuits. The presented method is illustrated by several well- described design examples.

In many electronic systems, such as telecommunication or measurement systems, oscillations play an essential role in the information processing. Each electronic system poses different requirements on these oscillations, depending on the type and performance level of that specific system. It is the designer's challenge to find the specifications for the desired oscillation and to implement an electronic circuit meeting these specifications. As the desired oscillations have to fulfill many requirements, the design process can become very complex. To find an optimal solution, the designer requires a design methodology that is preferably completely top-down oriented. To achieve such a methodology, it must be assured that each property of the system can be optimized independently of all other properties. Oscillators and Oscillator Systems: Classification, Analysis and Synthesis takes a systematic approach to the design of high-performance oscillators and oscillator systems. A fundamental classification of oscillators, based on their internal timing references, forms the basis of this approach. The classification enables the designer to make strategic design decisions at a high hierarchical level of the design process. Techniques, derived from the systematic approach, are supplied to the designer to enable him or her to bring the performance of the system as close as possible to the fundamental limits. Oscillators and Oscillator Systems: Classification, Analysis and Synthesis is an excellent reference for researchers and circuit designers, and may be used as a text for advanced courses on the topic.