José E. Franca

Multirate Switched-Capacitor Circuits for 2-D Signal Processing introduces the concepts of analog multirate signal processing for the efficient implementation of two-dimensional (2-D) filtering in integrated circuit form, particularly from the viewpoints of silicon area and power dissipation. New 2-D switched-capacitor (SC) networks and design techniques are presented, both with finite impulse response (FIR) and infinite impulse response (IIR) with separable denominator polynomial, which offer simpler and more systematic synthesis procedures than currently available design techniques for 2-D analog filters. Since they are in the discrete-time domain, the book can be also referred to the digital multirate signal processing. A 2-D SC image processor that realizes both (2 x 2)nd-order Butterworth lowpass and highpass filtering functions for video image signals was realized as a prototype integrated circuit implemented in 1.0-mum CMOS technology. The experimental characterization of this prototype chip demonstrated the feasibility of real-time analog multirate 2-D image processing with equivalent 8-bits accuracy, using only 2.5 x 3.0 mm2 of silicon area and dissipating as little as 85 mW at 5V supply and 18 MHz sampling rate. This indicates that for moderate accuracy and low to moderate complexity of the filtering function, a fully multirate analog implementation has a potential to achieve a more competitive implementation than an alternative digital VLSI implementation. However, for high accuracy and/or higher processing complexity, not only the relative overhead cost of the front-end and back-end converters will diminish but also the implementation of the processing core in digital VLSI will benefit more of technology scaling to achieve higher density of integration. Multirate Switched-Capacitor Circuits for 2-D Signal Processing is essential reading for practicing analog design engineers and researchers in the field. It is also suitable as a text for an advanced course on the subject.

Systematic Design for Optimisation of Pipelined ADCs proposes and develops new strategies, methodologies and tools for designing low-power and low-area CMOS pipelined A/D converters. The task is tackled by following a scientifically-consistent approach. First of all, the state of the art in pipeline A/D converters is analysed with a double purpose: a) to identify the best suited among different strategies reported in literature and taking into account the objectives pursued; b) to identify the drawbacks of these strategies as a basic first step to improve them. Then, the book proposes a top-down design approach for implementing high-performance low-power and low-area CMOS pipelined A/D converters through: The conception, development and implementation of self-calibrated techniques to extend the linearity of some critical stages in the architecture of pipelined ADCs. The detailed analysis and modelling of some major non-idealities that limit the physical realisation of pipelined ADCs and the proposal, development and implementation of design methodologies to support systematic design of optimised instances of these converters which combine maximum performance with minimum power dissipation and minimum area occupation. £/LIST£ Several implementations together with consistent measured results are presented. In particular, a practical realisation of a low-power 14-bit 5MS/s CMOS pipelined ADC with background analogue self-calibration is fully described. The proposed approach is fully in line with the best practice regarding the design of mixed-signal integrated circuits. On the one hand, drawbacks of currently existing solutions are overcame through innovative strategies and, on the other hand, the expert knowledge is packaged and made available for re-usability by the community of circuit designers. Finally, feasibility of the strategies and the associated encapsulated knowledge isgranted through experimental validation of working silicon. Systematic Design for Optimisation of Pipelined ADCs serves as an excellent reference for analogue design engineers especially designers of low-power CMOS A/D converters. The book may also be used as a text for advanced reading on the subject.

Systematic Design for Optimisation of Pipelined ADCs proposes and develops new strategies, methodologies and tools for designing low-power and low-area CMOS pipelined A/D converters. The task is tackled by following a scientifically-consistent approach. First of all, the state of the art in pipeline A/D converters is analysed with a double purpose: a) to identify the best suited among different strategies reported in literature and taking into account the objectives pursued; b) to identify the drawbacks of these strategies as a basic first step to improve them. Then, the book proposes a top-down design approach for implementing high-performance low-power and low-area CMOS pipelined A/D converters through: The conception, development and implementation of self-calibrated techniques to extend the linearity of some critical stages in the architecture of pipelined ADCs. The detailed analysis and modelling of some major non-idealities that limit the physical realisation of pipelined ADCs and the proposal, development and implementation of design methodologies to support systematic design of optimised instances of these converters which combine maximum performance with minimum power dissipation and minimum area occupation. £/LIST£ Several implementations together with consistent measured results are presented. In particular, a practical realisation of a low-power 14-bit 5MS/s CMOS pipelined ADC with background analogue self-calibration is fully described. The proposed approach is fully in line with the best practice regarding the design of mixed-signal integrated circuits. On the one hand, drawbacks of currently existing solutions are overcame through innovative strategies and, on the other hand, the expert knowledge is packaged and made available for re-usability by the community of circuit designers. Finally, feasibility of the strategies and the associated encapsulated knowledge isgranted through experimental validation of working silicon. Systematic Design for Optimisation of Pipelined ADCs serves as an excellent reference for analogue design engineers especially designers of low-power CMOS A/D converters. The book may also be used as a text for advanced reading on the subject.

Multirate Switched-Capacitor Circuits for 2-D Signal Processing introduces the concepts of analog multirate signal processing for the efficient implementation of two-dimensional (2-D) filtering in integrated circuit form, particularly from the viewpoints of silicon area and power dissipation. New 2-D switched-capacitor (SC) networks and design techniques are presented, both with finite impulse response (FIR) and infinite impulse response (IIR) with separable denominator polynomial, which offer simpler and more systematic synthesis procedures than currently available design techniques for 2-D analog filters. Since they are in the discrete-time domain, the book can be also referred to the digital multirate signal processing. A 2-D SC image processor that realizes both (2 x 2)nd-order Butterworth lowpass and highpass filtering functions for video image signals was realized as a prototype integrated circuit implemented in 1.0-mum CMOS technology. The experimental characterization of this prototype chip demonstrated the feasibility of real-time analog multirate 2-D image processing with equivalent 8-bits accuracy, using only 2.5 x 3.0 mm2 of silicon area and dissipating as little as 85 mW at 5V supply and 18 MHz sampling rate. This indicates that for moderate accuracy and low to moderate complexity of the filtering function, a fully multirate analog implementation has a potential to achieve a more competitive implementation than an alternative digital VLSI implementation. However, for high accuracy and/or higher processing complexity, not only the relative overhead cost of the front-end and back-end converters will diminish but also the implementation of the processing core in digital VLSI will benefit more of technology scaling to achieve higher density of integration. Multirate Switched-Capacitor Circuits for 2-D Signal Processing is essential reading for practicing analog design engineers and researchers in the field. It is also suitable as a text for an advanced course on the subject.