Nikil Dutt

Resource management has a long history in computing, from the early days of time-shared machines with pioneering fundamental work on run-time systems, distributed systems, real-time operating systems and middleware. The longevity and fundamental importance of the topic has resulted in an incredibly large body of work for on-chip resource management in the past two decades. The possible combinations of sub-topics and variations in the assumptions, use of different terminology, metrics, goals, and use-cases, leaves anyone attempting to review the literature overwhelmed. On-Chip Dynamic Resource Management is the first comprehensive and coherent review of all aspects of on-chip run-time resource management designed to facilitate understanding of recent trends in dynamic and adaptive strategies. The authors provide the reader with a framework within which they can navigate both existing, as well as evolving research efforts in on-chip dynamic resource management. Written by leading experts in the field, researchers and students are provided a structured review and discussion of the state of the art that is divided along the primary objectives of resource management techniques: performance, power, reliability and quality of service.

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design. On-Chip Communication Architecures is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures.